I thought I would do all the hard stuff in one post. Silly me.
Plus I had to hack into the HTML code because the defaults from WordPress dot com don’t format text with graphics very well.
(Didn’t know I could do that, did ya’?
)
In the previous posts I talked about the counters and how their output got to be displayed. Now I need something to count and how to count it.
In general, counting chips only require a pulse on the clock line. More specifically a rising or falling edge of a pulse but that might be a little too much detail. To be simple and direct, the trigger is what generates this pulse.
The trigger is difficult because switches inevitably bounce or chatter, a single button push or switch closure could create multiple counts. Switch bounce is an artifact of using a mechanical device that contains its own energy storage elements, even if they are simply parasites on the device. A good discussion of this problem is found in an application note by Maxim, Application Note 287. (see www.maxim-ic.com/app-notes/index.mvp/id/287)
[Had I know about the Maxim MAX6816 before the design started I might have tired them. They appear to be carried by most distributors and cost about $3.50 each.] Compounding the bounce issue is the switch I want to use.
In previous designs I used a switch which had both a normally closed and a normally open connection. One side is always high and the other low because both have pull up resistors. This forms a “complimentary pair” of signals the work well with the RS latch used to block out the bouncing. The “Normally Closed” or NC contact is usually pulled down to ground. The “Normally Open” or NC contact is pulled high. During a change, contacts will be open causing both outputs to be high. In the RS latch discussion below you will understand why that is good.
But the switch I plan to use has only a Normally Open contact, so I will have to somehow generate a complimentary signal to feed the latch correctly.
The RS or Reset-Set latch is one of several methods of debouncing switch signals. It is a method I have used successfully before. Most often these types of latches are made of Nand or Nor gates, such as this circuit of Nand gates:
The truth table for the Nand or Not And gate is shown here for convenience:
A quick explanation:
An AND logical function has a High output (Logic 1, 5V, etc) only when BOTH inputs are High.
For a NAND, take an AND logic function and invert the output. Thus when both inputs are high the output is low. (when any input is low the output is high)
The gate truth table is used to generate the RS latch truth table:
The latching action of the circuit holds the previous state independent of the input to the latch. Thus keeping the switch bounces at the switch.
The latch itself is pretty straight forward, but how do I generate this complementary set of signals? My choice was to use a comparator, an LM393. By using a reference voltage and opposite polarity inputs generating a complementary signal should be easy. So the circuit now looks like this:
{Essentially Comparators make a decision, if the input is greater than the REFerence the comparator turns on which generates a logic Low signal. Otherwise the output is a logic high.}
But this is something that I am not sure of, so I choose to simulate this section. I have a copy of Linear Technology’s Switcher CAD, which is a SPICE based simulator and should give me some insights into how this circuit should behave.
Input Voltage V2 simulates the voltage at the top of the switch
Looking at the simulation results, all looks as expected.
But I zoom into a transition point to see what is going on and there could be trouble.
There is a point were both outputs are low. Yes it is only a few nanoseconds, but let’s see if there is a better alternative. One thing to try is to create a high and low reference voltage. I do this by adding a smaller value resistor in the middle of the reference divider, as shown:
This gives me better results:
Now there is no time when both signals are low. In fact there is a nice overlap of high signals. Only 2-3 micro seconds, but still adequate.
So the final Trigger circuit looks like this:
I have added small sketches of what the signal should look like at significant moments of use. This will, hopefully, help me debug the circuit later.
(Also be aware that I did try other values for R104, the Hysteresis resistor. The 499 Ohm value seemed to work best.)
This took longer than I had planned, so I will have to talk about the alarm next time.
It seems that WordPress can not adequately deal with formatting text with figures. I finally had to go into the HTML code and add things and remove things to get what I wanted. And keep the whole thing from looking awful. Quite tedious.
And anything that I pasted in from something like word gets strange formatting that I had to remove.
So what kind of work will the next post take to do?.












